features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? undervoltage lockout ? programmable oscillator frequency f = + 1 1.4 (r 75 ) c tt ? ? matched propagation delay for both channels ? low side output in phase with r t description the ir2151 is a high voltage, high speed, self-os- cillating power mosfet and igbt driver with both high and low side referenced output channels. pro- prietary hvic and latch immune cmos technologies enable ruggedized monolithic construction. the front end features a programmable oscillator which is simi- lar to the 555 timer. the output drivers feature a high pulse current buffer stage and an internal deadtime designed for minimum driver cross-conduction. propa- gation delays for the two channels are matched to sim- plify use in 50% duty cycle applications. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration that operates off a high voltage rail up to 600 volts. preliminary data sheet no. pd60034- j self-oscillating half-bridge driver product summary v offset 600v max. duty cycle 50% i o +/- 100 ma / 210 ma v out 10 - 20v deadtime (typ.) 1.2 s packages typical connection 1 8 lead pdip 8 lead soic ir2151 (note: for new designs, we recommend ir?s new products ir2153 and ir21531) up to 600v v cc v b v s ho lo com r t c t to load (refer to lead assignment diagram for correct pin configuration)
ir2151 2 symbol definition min. max. units v b high side floating supply voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v lo low side output voltage -0.3 v cc + 0.3 v rt r t voltage -0.3 v cc + 0.3 v ct c t voltage -0.3 v cc + 0.3 i cc supply current (note 1) ? 25 i rt r t output current -5 5 dv s /dt allowable offset supply voltage transient ? 50 v/ns p d package power dissipation @ t a +25c (8 lead dip) ? 1.0 (8 lead soic) ? 0.625 r ja thermal resistance, junction to ambient (8 l ead dip) ? 125 (8 lead soic) ? 200 t j junction temperature ? 150 t s storage temperature -55 150 c t l lead temperature (soldering, 10 seconds) ? 300 absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage param- eters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. v c/w w ma structure between the chip v cc and com which has a nominal breakdown voltage of 15.6v. therefore, the ic supply voltage is normally derived by forcing current into the supply lead (typically by means of a high value resistor connected between the chip v cc and the rectified line voltage and a local decoupling capacitor from v cc to com) and allowing the internal zener clamp circuit to determine the nominal supply voltage. there- fore, this circuit should not be driven by a dc, low impedance power source of greater than v clamp . note 1: because of the ir2151?s application specificity toward off-line supply systems, this ic contains a zener clamp symbol definition min. max. units v b high side sloating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage ? 600 v ho high side floating output voltage v s v b v lo low side output voltage 0 v cc i cc supply current (note 1) ? 5 ma t a ambient temperature -40 125 c recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s offset rating is tested with all supplies biased at 15v differential. v
ir2151 3 symbol definition min. typ. max. units t est conditions t r turn-on rise time ? 80 120 t f turn-off fall time ? 40 70 dt deadtime 0.50 1.20 2.25 s dr t duty cycle 48 50 52 % dynamic electrical characteristics v bias (v cc , v bs ) = 12v, c l = 1000 pf and t a = 25c unless otherwise specified. ns symbol definition min. typ. max. units t est conditions f osc oscillator frequency 19.4 20.0 20.6 r t = 35.7 k ? 94 100 106 r t = 7.04 k ? v clamp v cc zener shunt clamp voltage 14.4 15.6 16.8 i cc = 5 ma v ct+ 2/3 v cc threshold 7.8 8.0 8.2 v ct- 1/3 v cc threshold 3.8 4.0 4.2 v ctuv c t undervoltage lockout ? 20 50 2.5v ir2151 4 functional block diagram lead assignments 8 lead dip 8 lead soic ir2151 ir2151s v b pulse gen delay hv level shift v cc pulse filter dead time lo ho v s com r s q 15.6v c t r t uv detect + - + - r q sq r r r dead time symbol description r t oscillator timing resistor input,in phase with lo for normal ic operation c t oscillator timing capacitor input, the oscillator frequency according to the following equation: f = + 1 1.4 (r 75 ) c tt ? where 75 ? is the effective impedance of the r t output stage v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side and logic fixed supply lo low side gate drive output com low side return lead definitions
ir2151 5 01-3003 01 8 lead pdip 01-0021 08 8 lead soic
ir2151 6 figure 1. input/output timing diagram figure 2. switching time waveform definitions figure 3. deadtime waveform definitions ho v cc v clamp v ccuv + r t c t lo r t (lo) t r t f lo ho 50% 50% 90% 90% 10% 10% r t (ho) r t ho 50% 50% 90% 10% lo 90% 10% dt world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 http://www.irf.com/ data and specifications subject to change without notice. 3/30/2001
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